SRAM

美 　英

• abbr.(=short-range attack missile)近程攻擊導(dǎo)[飛]彈
• 網(wǎng)絡(luò)靜態(tài)隨機(jī)存儲(chǔ)器(Static Random Access Memory)；靜態(tài)存儲(chǔ)器；靜態(tài)隨機(jī)存取存儲(chǔ)器

英漢解釋

abbr.

1. (=short-range attack missile)近程攻擊導(dǎo)[飛]彈

英英解釋

abbr.

1. (=short-range attack missile)

例句

SDRAM should not be confused with SRAM, or static RAM, which is extremely fast and expensive memory used for processor cache memory .

（請不要把SDRAM與SRAM（靜態(tài)RAM）相混淆，SRAM是速度極快且非常貴的存儲(chǔ)器，用于處理器的緩沖存儲(chǔ)器。）

Traditionally, an SRAM chip is made more dense by shrinking its basic building block, often referred to as a cell.

從傳統(tǒng)上而言，SRAM芯片通過縮小基本構(gòu)建單元，來制造得更加緊密。

Traditionally, We used a CPU with a SRAM and an EEPROM to implement the control module on a wireless transmitting equipment.

無線傳輸設(shè)備控制模塊傳統(tǒng)的實(shí)現(xiàn)方法是采用一塊處理器，附加SRAM、EEPROM等電路來實(shí)現(xiàn)。

Sometimes, the contents of a ROM chip are copied to SRAM or DRAM to allow for shorter access times (as ROM may be slower).

有時(shí)，內(nèi)容的光碟片復(fù)制到SRAM或DRAM芯片，以便縮短存取時(shí)間（如ROM可能會(huì)比較慢）。

The SRAM memory means comprises a first pass-gate FET (T6) which is coupled between a first node (A) and a bit line-bar (BLB).

SRAM存儲(chǔ)器裝置包括耦合在第一節(jié)點(diǎn)（A）和位線條（BLB）之間的第一門FET（T6）。

These chips were SRAM memory chips often used to get new manufacturing processes debugged.

這些芯片SRAM存儲(chǔ)器通常用來獲取新的芯片制造工藝調(diào)試。

The simulation result shows that the SRAM ping-pong operation is realized and the position detection of the adhesive tape is completed.

仿真結(jié)果表明，系統(tǒng)實(shí)現(xiàn)了SRAM的乒乓操作，并完成了黑色膠條位置檢測。

The arbitrated module is used to control the state of affairs of reading or writing the same storage cell of SRAM with double ports.

因?yàn)?/c>所設(shè)計(jì)的SRAM為雙端口器件，對于SRAM對同一單元的讀寫操作情況，通過結(jié)合仲裁控制電路控制實(shí)現(xiàn)。

To the result of analyze and the demand of process, the high reliable SRAM is presented.

根據(jù)分析結(jié)果和現(xiàn)有工藝要求，設(shè)計(jì)了高可靠的靜態(tài)存儲(chǔ)單元。

A two-port SRAM memory cell (20) includes a pair of cross-coupled inverters (40) coupled to storage nodes.

一種二端口SRAM存儲(chǔ)器單元（20）包括耦合到存儲(chǔ)節(jié)點(diǎn)的一對交叉耦合的反相器（40）。

NVRAM frequently consists of an SRAM and a long-life battery.

NVRAM常常由SRAM和長壽命電池組成。

Data stored in an SRAM is lost when the system is powered down or reset.

當(dāng)系統(tǒng)斷電或重啟時(shí)，保存在SRAM中的內(nèi)容將丟失。

With the SRAM capacity increasing, the circuit scale increases dramatically.

隨著SRAM容量的提高，電路規(guī)模也急劇上升。

This paper introduces the hardware and software of a high speed graphic LED screen based on dual processors and dual port SRAM.

介紹了一種基于雙處理器和雙口SRAM的高速圖形LED屏的硬件和軟件。

SRAM devices of ALTERA PLD technology is widely used special allocation of more expensive devices.

SRAM的器件Altera的可編程邏輯器件技術(shù)的廣泛使用的特別撥款，更昂貴的設(shè)備。

For protection, can cut the power by checking current of SRAM chip; avoid damage of SRAM chip in the experiment.

通過對SRAM芯片電流的檢測，斷電保護(hù)解決了在SRAM實(shí)驗(yàn)過程中SRAM芯片的損壞問題。

The influence of single particle radiation to IC reliability, especial to SRAM, is analyzed.

本文分析了單粒子輻射對集成電路可靠性的影響，特別是對SRAM存儲(chǔ)器的影響。

Chip makers are searching for cheap, fast, "universal" memories to replace DRAM, SRAM and flash.

芯片制造商正在尋找廉價(jià)、快速、通用的存儲(chǔ)器來替代DRAM、SRAM和閃存。

The most serious offering is a 15 lb. carbon fiber racing bike with an SRAM Red gearshift and brakes.

最讓人興趣盎然的產(chǎn)品當(dāng)屬僅15磅重的碳纖維競賽自行車，它配備一個(gè)由SRAMRed實(shí)驗(yàn)室設(shè)計(jì)的變速器以及剎車裝置。

This dissertation puts forward the implementation of a novel 4-transistor SRAM memory cell based on SOI technology.

論文在分析SOI存儲(chǔ)器技術(shù)的基礎(chǔ)上，提出了一種新穎的四管SRAM存儲(chǔ)單元。

We also apply this method in the floor plan of register file and SRAM layout, and gain a good result.

在寄存器文件和SRAM版圖設(shè)計(jì)中使用上述方法，有效提高了版圖實(shí)現(xiàn)所需時(shí)間。

It is commonly believed that SRAM belongs to the volatile semiconductor memory.

通常認(rèn)為，SRAM屬于易失性半導(dǎo)體存儲(chǔ)器。

On the operating speed and the energy consumption new memory exceeds memory of type SRAM.

對運(yùn)行速度和能源消耗的新記憶體超過記憶體類型的SRAM。

Problem: High-density memory beyond SRAM is needed in today's devices.

問題：現(xiàn)今的設(shè)計(jì)需要優(yōu)于SRAM的高密度內(nèi)存。

Third, it improves the filtering algorithm and rearranges the filtering order to decrease the access frequency of SRAM.

三是采用了改進(jìn)的濾波算法，重新安排濾波順序，減少了對SRAM的訪問次數(shù)；

The paper also takes SRAM interface design as one example to describe how to design external memory interface.

并以SRAM的接口設(shè)計(jì)為例簡單的介紹了如何進(jìn)行外部存儲(chǔ)器的接口設(shè)計(jì)。

Current solution: Traditional 6T SRAM cells are used in processors and other products.

目前的解決方案：傳統(tǒng)的6TSRAM內(nèi)存單元已經(jīng)應(yīng)用在處理器等產(chǎn)品中采用。

The mechanism of data remancence of SRAM is studied by experiment, the relationship between data remanence time and temperature is built.

通過實(shí)驗(yàn)進(jìn)行了SRAM數(shù)據(jù)殘留機(jī)理的研究，建立了數(shù)據(jù)殘留時(shí)間與溫度的關(guān)系。

It is the first company of SMIC who uses MOSAID to test embedded SRAM , get its bitmap and find the failure root cause.

在MOSAID上對邏輯芯片中的SRAM測試并得到失效的Bitmap并找到故障原因，在業(yè)界是第一次。

Design with less on-chip SRAM, an increase of temporary storage at the same time to complete the transpose register unit.

設(shè)計(jì)中使用較少的片內(nèi)SRAM，增加了暫存并同時(shí)能完成轉(zhuǎn)置的寄存器單元。

The address decoderdecodes the corresponding port address through the 10-bit bus while the address generatorgenerates the SRAM address.

地址譯碼部分通過來自總線的10位地址譯出相應(yīng)端口并產(chǎn)生對應(yīng)的控制信號；

In one embodiment, the semiconductor device includes a static random access memory (SRAM) cell having numerous NFETs (110) and PFETs (112).

在一個(gè)實(shí)施例中，所述半導(dǎo)體器件包括具有多個(gè)NFET（110）和多個(gè)PFET（112）的靜態(tài)隨機(jī)存取存儲(chǔ)器（SRAM）單元。

Quad data rate SRAM is a high speed SRAM that can be read and written at the same time.

四倍數(shù)據(jù)率靜態(tài)存儲(chǔ)器是一種可以同時(shí)讀寫的高速靜態(tài)存儲(chǔ)器。

It features an astonishing 0. 125 MB of SRAM and 1 MB of flash memory.

它以一個(gè)令人驚訝的0。125MB的靜態(tài)隨機(jī)存儲(chǔ)器（SRAM）和1MB的閃存記憶為特色。

CMOS SRAM Complementary Metal Oxide Semiconductor Static Random Access Memory

互補(bǔ)金屬氧化物半導(dǎo)體靜態(tài)隨機(jī)存取存儲(chǔ)器

Application of Ant Colony Algorithm in SRAM Hierarchical Partition

螞蟻算法在SRAM層次化劃分中的應(yīng)用

Research of CMOS SRAM Radiation Harden Circuit Design Technology

抗輻照加固電路設(shè)計(jì)技術(shù)研究

Choosing the Right SRAM Architecture for Peak Performance

為實(shí)現(xiàn)高性能選擇正確的SRAM架構(gòu)

Study on Hard X-Rays Dose Enhancement Effects for SRAM with Different Integration

不同集成度SRAM硬X射線劑量增強(qiáng)效應(yīng)研究

Design of Clocked Transmission Gate Adiabatic Logic Circuit and SRAM

鐘控傳輸門絕熱邏輯電路和SRAM的設(shè)計(jì)