TLB

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• 網(wǎng)絡(luò)快速啟動(dòng)工具欄(true launch bar)；緩沖器；后援緩沖器

例句

Whenever an instruction is fetched from memory, the instruction pointer is translated via the instruction TLB into a physical address.

無論何時(shí)從內(nèi)存中取一個(gè)指令，指令指針都會(huì)經(jīng)指令TLB的翻譯后指向物理地址。

An increase in TLB hit rate improves the CPI metric and, therefore, performance of that program.

提高TLB命中率可以提高CPI度量，從而也提高程序的性能。

The source library is a file with a . tlb extension, as opposed to a . dll extension.

源庫是一個(gè)擴(kuò)展名為.tlb的文件，圖5中的擴(kuò)展名則是.dll。

Seems inefficient - 3 memory accesses for one user memory access. So, speed it up with a TLB. 64 entry fully associative TLB.

這樣看起來效率太差了--一次用戶空間的訪問需要3次物理內(nèi)存的訪問。那就用TLB來加速它！

A TLB is a relatively small cache area that stores the most-recent address translation in anticipation of its potential reuse.

TLB是一個(gè)較小的緩存區(qū)域，用于存儲(chǔ)最近的地址轉(zhuǎn)換，以便再次使用。

TLB cache entry reuse (cache hit) equates to quicker address translation and subsequently faster access to physical memory.

TLB緩存條目重用（緩存命中）意味著更快的地址轉(zhuǎn)換，還意味著對物理內(nèi)存的更快的訪問。

The TLB miss overhead represents one important component of the overall CPI metric.

TLB失誤的開銷是整個(gè)CPI度量中的一個(gè)重要部分。

The core component is called RqGuiApp. tlb.

它的核心組件為RqGuiApp.tlb。

TLB is the cache holding the mapping information from the virtual address to the physical page in memory.

TLB緩存包含從虛擬地址到內(nèi)存中物理頁面的映射信息。

Childhood things, laughter and talk, order date and the TLB, mountain, evil really from music, laughter and weak.

童年之事，笑而談之，序日過而之，山地為證，邪真從樂，笑而淡之。

When data is fetched or stored, the processor uses a separate data TLB for the translation.

當(dāng)數(shù)據(jù)存取時(shí)，處理器會(huì)使用獨(dú)立的數(shù)據(jù)TLB來進(jìn)行翻譯。

Select the type library from the Available References list, or browse for the TLB file.

從“可用引用”列表中選擇類型庫，或通過瀏覽選擇TLB文件。

Apply TLB attributes to libraries, types, members, and parameters.

將TLB屬性應(yīng)用于庫、類型、成員和參數(shù)。

To speed up address translation, there is a processor-on-a-chip (PoC) cache and associated logic called translation lookaside buffer (TLB).

為了加快地址轉(zhuǎn)換，架構(gòu)中有一個(gè)processor-on-a-chip（PoC）緩存和相關(guān)的轉(zhuǎn)換后備緩沖器（TLB）邏輯。

The fewer pages would mean that the TLB process would have a higher hit ratio and therefore improved performance.

頁數(shù)越少，意味著TLB進(jìn)程將具有更高的命中率，因而性能更好。

A standalone type library typically has a . tlb extension.

獨(dú)立類型庫通常以.tlb為擴(kuò)展名。

This is because TLB is able to map a larger virtual memory range.

這是因?yàn)?/c>TLB能夠映射更大的虛擬內(nèi)存范圍。

Chart 2 correlates the performance improvements seen in Chart 1 with the decreased CPI and the corresponding decrease in TLB miss rates.

圖2將圖1看到的性能提升與減少的CPI和相應(yīng)減少的TLB失誤率關(guān)聯(lián)起來。

A TLB miss requires accessing a page table that is stored in the main memory, which consumes considerably more processor cycles.

如果TLB沒有命中，那么就需要訪問存儲(chǔ)在主存中的頁表，而這樣做需要消耗相當(dāng)多的處理器周期。

Takes a list of one or more type library names or . tlb files and resolves those type libraries to locations on disk.

當(dāng)您提供越多資訊以唯一識(shí)別型別程式庫時(shí)，工作就越可能解析至磁碟上的正確檔案。

The use of large pages can also improve performance by reducing the number of translation lookaside buffer (TLB) misses.

大內(nèi)存頁的使用還可以通過減少變換索引緩沖（translationlookasidebuffer，TLB）的失敗次數(shù)來提高性能。

One option is to increase the TLB size.

一種選擇是增加TLB大小。

Look for domobj. tlb in the base installation directory.

在基本安裝目錄中可以找到domobj.tlb。

If there are too many TLB misses, your code read data in large address range.

如果發(fā)生了很多TLB失效，就說明代碼讀取大地址范圍中的數(shù)據(jù)。

Legal file types to add are DLL, EXE, and TLB.

可添加的合法文件類型有DLL、EXE和TLB。

Ship the 6. 0 type library from Windows 7 RTM via the new type library file msado60. tlb.

通過新的類型庫文件msado60.tlb為Windows7RTM發(fā)布6.0類型庫。

However, because of on-chip space limitations, the TLB size can not be increased proportionally.

然而，由于芯片空間的限制，TLB的大小不能成比例地增加。

Research on TLB Design Methodology of Embedded Processor

嵌入式處理器TLB設(shè)計(jì)方法研究

The Optimization Design of TLB of High Performance Processor

高性能微處理器TLB的優(yōu)化設(shè)計(jì)

balance-tlb (transmit load balancing)

balance-tlb（傳輸負(fù)載平衡）

Design of TLB for Embedded Processor

嵌入式處理器的TLB電路設(shè)計(jì)