adders
美 [?æd?r]
英 [?æd?(r)] 
- n.加法器;加法電路;蝰蛇
- 網(wǎng)絡(luò)加法器的描述;故事
詞形變化
復(fù)數(shù):adders 同義詞
英漢解釋
英英解釋
例句
It seemed as though two immense adders of steel were to be seen crawling towards the crest of the table-land.
遠(yuǎn)遠(yuǎn)望去,好象兩條鋼筋鐵骨的巨蟒爬向那高地的山脊。
In particular embodiments, the interpolation units are formed from adders and shifters and do not include any multipliers.
在特定的實(shí)施方式中,該內(nèi)插單元由加法器和移位器形成,而且不包括任何乘法器。
Encounter adders at Allerthorpe, the best place in Britainto see them.
遇到豬鼻蛇,這是在大不列顛觀察他們的最佳的地點(diǎn)。
Adders and serpents, let me breathe a while!
小毒蛇和大毒蛇,讓我喘口氣!
Adders add up the command motion amounts and the respective compensation motion amounts to drive respective motors.
加法器將指令移動量與各補(bǔ)償移動量相加以驅(qū)動各馬達(dá)。
Unhappily, though the nation still retains its ears, the players and playgoers of this generation are for the most part deaf as adders.
不幸的是,盡管國家的耳力尚存,可這一代的戲劇從業(yè)者和觀眾卻耳聾透頂。
Twice puff-adders came twisting into the alert ring of our debating coffee-circle.
鼓腹毒蛇曾經(jīng)兩次竄進(jìn)我們的喝咖啡和進(jìn)行討論的警戒圈內(nèi)。
I loved their sign: "Adders very active at this time of year, keep to the paths" .
我喜歡他們的告示:“每年這個時候是蝰蛇異常活躍的時期,請勿偏離小路行走。”
By using quantization scheme, the use of multipliers can be substantially reduced and simplified to only adders.
透過量化的方法,乘法器的數(shù)量可以被大幅度減少成只使用加法器。
Reuse of some adders and registers in IIR filter design- for-testability, additional hardware and area overhead are reduced.
通過復(fù)用原電路中的部分寄存器和加法器來提高其可測性,降低了額外的測試硬件面積開銷。
Because of the requirements for high speed and high precision in adders, redundant signed digit number adders are proposed.
冗余符號數(shù)加法器滿足了對加法器高速度和高精度的要求。
Operation of plurality add is very complicated. In the design will numerous adders be used and large area will be consumed.
復(fù)數(shù)加法運(yùn)算復(fù)雜,用硬件實(shí)現(xiàn)復(fù)數(shù)加法,需要使用數(shù)目眾多的加法器,占用大量的面積。
Adders have a dark zigzag stripe down their back.
加法器有一個黑暗的曲折條紋他們回來。
Only full adders (3: 2 compressor) and half adders are used in our Wallace tree.
只有全加器(3:2空氣壓縮機(jī))和半加器用于我們的華萊士樹。
Delay Time Formulae and Optimizing Sequence of Hybrid Modules Cascade Carry Lookahead Adders
超前進(jìn)位加法器混合模塊延遲公式及優(yōu)化序列
Design of Hybrid Modules Cascade Carry Lookahead Adders without Waiting Time Sequence
混合模塊無等待時間序列超前進(jìn)位加法器設(shè)計(jì)
Delay Time Formulae and Optimizing Design of Carry Lookahead Adders
超前進(jìn)位加法器的延遲時間公式與優(yōu)化設(shè)計(jì)
Tabular synthesis of three-variable functions using one-bit full adders
基于一位全加器三變量邏輯函數(shù)的查表綜合
Specification and Verification of Ripple Carry Adders Based on Rewriting Induction Techniques
基于重寫歸納技術(shù)的串行加法器的描述和驗(yàn)證
Inductive Verification of Powerlist-Based Carry Lookahead Adders
基于冪表的并行加法器的歸納驗(yàn)證
Universal Design Method for Current-Mode CMOS Adders Based on Threshold-Controllable Technique
基于控閾技術(shù)的電流型CMOS全加器的通用設(shè)計(jì)方法
Optimal block distribution in carry-skip adders
二級進(jìn)位跳躍加法器的優(yōu)化方塊分配
Research for High-speed Floating-point adders
快速浮點(diǎn)加法器設(shè)計(jì)研究
Realization of FIR Filter with Minimum Adders
一種采用較少加法器的FIR濾波器實(shí)現(xiàn)方法
They Hatch Adders ' Eggs, And Weave The Spider's Web;
他們孵化毒蛇的蛋,和編織蜘蛛的網(wǎng);